1. Technical Field
The present invention relates to a DC-DC converter control method and DC-DC converter control circuit.
2. Related Art
A switching type DC-DC converter with excellent conversion efficiency, like, for example, the reference technology of FIG. 4, is widespread as a power conversion device that converts a direct current voltage into another direct current voltage.
The DC-DC converter of the reference technology shown in FIG. 4 includes a switching element SW and inductor L connected in series to an output terminal that outputs an output voltage Vout, a capacitor C connected between the output terminal and a ground potential (GND), a commutating diode D connected between a connection point of the switching element SW and inductor L and the ground potential, a PWM signal generating circuit that generates a drive signal Vdrv for controlling a turning on and off of the switching element SW by pulse width modulation (PWM), voltage dividing resistors Rd1 and Rd2 that divide the output voltage Vout, generating a feedback voltage Vd, an error amplifier, formed of a transconductance amplifier, that generates an output voltage Vea and inputs it into the PWM signal generating circuit, and a phase compensation capacitor Cc connected to an output of the error amplifier.
The error amplifier, by injecting or discharging a current in accordance with the difference between the reference voltage Vref and the feedback voltage Vd, wherein the output voltage Vout is divided by the voltage dividing resistors Rd1 and Rd2 and fed back, into or from the phase compensation capacitor Cc, generates the output voltage Vea, wherein the difference between the reference voltage Vref and feedback voltage Vd is amplified, as the voltage of the phase compensation capacitor Cc.
The PWM signal generating circuit generates a drive signal Vdrv in accordance with the output voltage Vea of the error amplifier. In the PWM signal generating circuit, a minimum value Tmin is provided for a pulse width Tdrv of the output drive signal Vdrv, and when Vea drops beyond a control range, the drive signal Vdrv having the minimum value Tmin for the pulse width Tdrv is output.
Herein, considering a case in which the load current decreases suddenly due to a load mode change, or the like, the output voltage Vout rises, and the feedback voltage Vd also rises, owing to which the output voltage Vea of the error amplifier starts to drop. Even when the pulse width Tdrv becomes as small as the minimum value Tmin, the output voltage Vea of the error amplifier continues to drop provided that the feedback voltage Vd is higher than Vref (that is, provided that the output voltage Vout exceeds a target value).
Although not shown in FIG. 4, it may be that, when operating the DC-DC converter under conditions wherein a rise of Vout is expected even when the pulse width of the drive signal Vdrv becomes the minimum value Tmin, a circuit that detects an overvoltage and skips a pulse is provided, thus keeping the rise of Vout within a predetermined range. In this kind of case, the output voltage Vea of the error amplifier stabilizes in a condition in which it has dropped to a lower limit determined by the circuit configuration of the error amplifier.
Herein, when the load current increases suddenly in a condition in which the output voltage Vea of the error amplifier has plummeted to the lower limit, Vea starts to rise again, but at this time, as time is needed until Vea reaches the PWM control range (the range in which the pulse width Tdrv spreads beyond Tmin), there is a technical problem in that the drop of the output voltage Vout increases.
With regard to a minimum on time of the switching element, the technologies of JP-A-2008-187813 and JP-A-2009-60439 are known.
In JP-A-2008-187813, there is disclosed a technology whereby, in a configuration in which the control of a switching element is switched between a PFM control and a PWM control depending on the size of a load, a minimum on period is set in the PWM control, an action turning off the switching element is carried out when the current flowing through the switching element exceeds an acceptable value after the minimum on period has elapsed, and the minimum on period is shorter than a PFM control on period.
Meanwhile, in JP-A-2009-60439, there is disclosed a method whereby, recognizing the same kind of problem with regard to the recovery of the output voltage Vea of the error amplifier, the lower limit of the output voltage of the error amplifier is restricted by adapting the circuit configuration of the error amplifier.
With this kind of circuit, however, it is not possible to obtain an advantage unless the control range of the PWM signal generating circuit is coordinated with the lower limit of the output voltage of the error amplifier. When using a differential amplifier to configure a kind of circuit wherein current is supplied to the phase compensation capacitor Cc when the output of the error amplifier drops below a predetermined voltage, it is possible to freely set the lower limit value, but when the PWM control range changes in accordance with operating conditions (for example, when Tmin is a fixed value but the switching frequency can be changed), it is difficult to respond using a method whereby Vea is given a fixed lower limit value in advance.